Efficient method for modeling three-dimensional interconnect structures for frequency-dependent crosstalk simulation

摘要

A method for reducing the computation time and improving the productivity in designing high-performance microprocessor chips that have no failures-due to crosstalk noise. The technique allows a very fast calculation of tables of frequency-dependent circuit parameters needed for accurate crosstalk prediction on lossy on-chip interconnections. These tables of parameters are the basis for CAD tools that perform crosstalk checking on >10K critical nets on typical microprocessor chips. A fast table generation allows for rapid incorporation of design or processing changes and transition to more advanced technologies.