发明名称 Circuit designing method for semiconductor device and computer-readable medium
摘要 There are provided a circuit designing method using a half-tone phase shift mask for forming a circuit pattern on a semiconductor substrate, and a computer-readable medium having recorded a program for causing a computer to execute the circuit designing method. The circuit designing method comprises the steps of: calculating a first lithography process tolerance, which is an index satisfying a range of a dimensional fluctuation allowed when a basic pattern representative of the circuit pattern is formed on the semiconductor substrate, and calculating a second lithography process tolerance, which is an index capable of avoiding the formation of a side lobe capable of being produced on the semiconductor substrate when the basic pattern is formed on the semiconductor substrate using the half-tone phase shift mask, respectively, using an optical simulation; calculating a common lithography process tolerance comprising an overlapping region of the first lithography process tolerance and the second lithography process tolerance; preparing an inhibiting rule for excluding a circuit pattern including the basic pattern, which is below a reference value previously set on the basis of the common lithography process tolerance, from an object to be designed; and designing a circuit using the inhibiting rule.
申请公布号 US6418553(B1) 申请公布日期 2002.07.09
申请号 US20000522951 申请日期 2000.03.10
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YAMADA AKIKO;HASHIMOTO KOJI;MIMOTOGI SHOJI
分类号 H01L21/027;G03F1/00;G03F1/08;G03F1/32;G03F1/36;G03F1/68;G03F1/70;G06F17/50;(IPC1-7):G06F7/60;G06F17/10 主分类号 H01L21/027
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