| 摘要 |
PROBLEM TO BE SOLVED: To reduce parasitic capacitance formed between a bit line for reading out the signal of a memory cell and a signal transmission line disposed on the upper layer thereof. SOLUTION: Complementary second global bit lines (GBL, /GBL) for transmitting the data of a memory cell MC, read out through complementary bit lines (BL, /BL), are disposed above a memory cell array (BLock). The second global bit line (GBL or /GBL) is disposed, such that an isosceles triangle is defined by connecting the center of cross-section of one complementary bit line (BL), the center of cross-section of the other complementary bit line (/BL), and the center of cross-section of the second global bit line (GBL or /GBL) disposed directly above these complementary bit lines (BL, /BL). |
