Segmented circuitry

摘要

Mixed-signal circuitry, such as a digital-to-analog converter (DAC) device, performs a series of operation cycles. The circuitry has n circuitry segments (21, 41 to 2n, 4n) which together produce an analog output signal (IA-IB). In each cycle a transfer function morphing section (22) generates, in dependence upon a digital input signal (D1-Dm), a set of n segment control signals (T1-Tn) for application to respective ones of said segments to influence the produced analog output signal. The n segment control signals are caused to be applied to the n segments in at least two different orders at different respective times. At least one order differs from the next order by more than a starting ordinal position amongst the segments. Also, the changes in ordinal position of the segments brought about by the changes in order of application of the segment control signals are limited in number and/or magnitude relative to said number n of segments. This changes a transfer function (accumulated non-linearity error caused by amplitude and/or delay mismatches between the segments) between two or more different forms over the course of the operation cycles. This reduces the transfer function variation between different manufactured devices which in turn can provide an improvement in guaranteed minimum performance for a given manufacturing yield or an improvement in yield for a given performance. Segmented circuitry having segments with well-defined and less-well-defined analog quantities is also disclosed (FIG. 29). The well-defined quantities are selected in use of the circuitry and the less-well-defined quantities are selected in a testing or setting up mode.