发明名称 Method, apparatus and computer readable medium for evaluating configuration of solder external terminals of a semiconductor device
摘要 A method of evaluating configuration of solder external terminals of a BGA-type tape-based semiconductor device mounted on a board such that the external terminals are joined to lands provided on the mounting board is provided. The method includes the step of obtaining geometric data related to opening of a tape substrate of the semiconductor device, solder balls to be placed at positions corresponding to the openings, and the lands of the mounting board and the step of deribing configuration of the solder external terminal based on the geometric date. The method further includes the step of calculating the volume of voids to be produced in the external terminals, so as to compensate for the geometric data related to the tape substrate.
申请公布号 US2002084308(A1) 申请公布日期 2002.07.04
申请号 US20010811573 申请日期 2001.03.20
申请人 FUJITSU LIMITED, KAWASAKI, JAPAN 发明人 IMAI KANAKO;ITO NOBUTAKA;ANDO FUMIHIKO
分类号 B23K3/06;H01L21/60;H05K3/34;(IPC1-7):B23K1/00;B23Q15/00;B23K31/02 主分类号 B23K3/06
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