HIGH-SPEED COMMUNICATION APPARATUS BETWEEN PROCESSORS IN DATA COMMUNICATION SYSTEM

摘要

PURPOSE: A high-speed communication apparatus between processors in a data communication system is provided to realize a fast communication speed higher than 100Mbps by using an FCC(Fast Communication Controller) of an MPU(Micro Processor Unit) configured on an I/O matching board performing an IPC communication between the I/O matching board and a main control board. CONSTITUTION: The device comprises an MPU(300) controlling the fast data communication between the I/O matching board(10) and the main control board(20), an FCC module(310) carrying out a data frame process of the fast data communication under the control of the MPU, and a local memory(340) storing the data exchanging with the main control board by a local memory controlling module(330). The local memory has a transmitting and receiving buffer area initially set by the control of the MPU. The data frame process for the IPC data communication performed by the FCC module is applied by an HDLC(High Level Data Link Control) mode.