发明名称 |
Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials |
摘要 |
A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
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申请公布号 |
US2002084481(A1) |
申请公布日期 |
2002.07.04 |
申请号 |
US20000751551 |
申请日期 |
2000.12.28 |
申请人 |
LIAN JINGYU;LIN CHENTING;NAGEL NICOLAS;WISE MICHAEL |
发明人 |
LIAN JINGYU;LIN CHENTING;NAGEL NICOLAS;WISE MICHAEL |
分类号 |
H01L21/02;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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