发明名称 |
Memory device with reduced number of fuses |
摘要 |
A redundancy circuit for a multiport memory device with preferably first and second memories includes a fuse programming circuit, shared between the first and second memories, for programming a first redundant address. A first address compare circuit compares a received address for the first memory with the first redundant address. The first address compare circuit generates a redundant address selection signal when the received address is the same as the first redundant address. A second address compare circuit compares a second received address for the second memory with the first redundant address. The second address compare circuit generates a redundant address selection signal when the received address is the same as the first redundant address. <IMAGE> |
申请公布号 |
EP0772202(B1) |
申请公布日期 |
2002.07.03 |
申请号 |
EP19960117396 |
申请日期 |
1996.10.30 |
申请人 |
HYUNDAI ELECTRONICS AMERICA, INC. |
发明人 |
PINKHAM, RAY |
分类号 |
G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C29/00;G06F11/20 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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