发明名称 DISPLAY DRIVING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a display driving circuit capable of properly controlling a delay value of a sampling pulse. SOLUTION: A delay selector 40 is arranged in a transmission route of a signal for timing generation of the sampling pulse. Then the delay value in this delay selector 40 is controlled according to a delay value in the transmission route. Thus, a video signal is synchronized with the sampling pulse.
申请公布号 JP2002182605(A) 申请公布日期 2002.06.26
申请号 JP20000380671 申请日期 2000.12.14
申请人 SANYO ELECTRIC CO LTD 发明人 SENDA MICHIRU;YOKOYAMA RYOICHI;MIYAJIMA KOJI;TSUTSUI YUSUKE
分类号 G02F1/133;G09G3/20;G09G3/36;H04N5/66;(IPC1-7):G09G3/20 主分类号 G02F1/133
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