发明名称 Voltage level bus translator and safety interlock system for battery modules
摘要 A serial communication interface including a bus voltage level translator and voltage safety interlock system is disclosed. According to a preferred embodiment of the invention, a voltage level translation interface (VLTI) is used to send Uplink and Downlink serial commands and data to a string of battery modules that result in large offset voltages. Through implementation of the VLTI design according to the various exemplary embodiments of the present invention, the addition of as many modules as required to form the desired battery voltage can be accommodated, while using low cost components. No optical couplers are required or other traditional DC blocking devices such as transformers, capacitors, or special isolation amplifiers in order to accommodate the large offset voltages. This is accomplished by level shifting each bit stream of commands up to the higher potential of the next module in the uplink data stream. Similarly in the downlink data stream, each bit stream is level shifted from the present potential to the lower potential of the next lower module.
申请公布号 US6411912(B1) 申请公布日期 2002.06.25
申请号 US19990350375 申请日期 1999.07.09
申请人 ALCATEL 发明人 SACK THOMAS T.
分类号 G01R31/36;G05B23/02;G06F1/28;H01M10/44;H01M10/48;H02J7/00;(IPC1-7):G01R31/36;G06F19/00 主分类号 G01R31/36
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