发明名称 APPARATUS FOR FREQUENCY COMPENSATION IN THE EVENT OF ABNORMALITY OF GPS RECEIVER IN IMT-2000 BASE STATION CONTROLLER SYSTEM
摘要 PURPOSE: An apparatus for frequency compensation in the event of the abnormality of a GPS receiver in an IMT-2000 BSC(Base Station Controller) system is provided to offer more high-qualified services to users through a stable supply of system clocks by securing a frequency of 100MHz to the maximum even in case that abnormality is generated from a GPS receiver. CONSTITUTION: An apparatus for frequency compensation in the event of the abnormality of a GPS receiver in an IMT-2000 BSC system consists of a GPS clock level conversion part(100), a Mux(200), a TSB(Transcoder Selector Bank) block(300), a PLL(Phase Loop Lock)(400), an ADC(Analog to Digital Converter)(500), a memory(600), a DAC(Digital to Analog Converter)(700), and an oscillator(800). The GPS clock level conversion part(100) receives 4 GPS clocks, converts their levels, and outputs them to the Mux(200). The Mux(200) receives the 4 GPS clocks from the GPS clock level conversion part(100) and outputs a relevant reference frequency clock(GPS10MPLD) and a relevant comparison frequency clock(OCXO10MPLD) to the PLL(400). The TSB block(300) receives a GPS10M and a GPSPPS from the Mux(200) and outputs system clocks of 10MHz to all the boards of the BSC. The PLL(400) receives the reference frequency clock and the comparison frequency clock from the Mux(200), compares them, and outputs a voltage value(PD_OUT), a phase difference, to the ADC(500). The ADC(500) receives the voltage value(PD_OUT) from the PLL(400), converts it into a digital signal, and stores the digital signal in the memory(600). The memory(600) stores the digital signal and supplies the stored digital signal to the DAC(700). The DAC(700) receives the stored digital signal from the memory(600), converts it into an analog signal, and outputs the converted signal to the oscillator(800). The oscillator(800) receives the analog signal from the DAC(700) and outputs a relevant OCXO10M to the Mux(200).
申请公布号 KR20020046634(A) 申请公布日期 2002.06.21
申请号 KR20000076902 申请日期 2000.12.15
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, YEONG JUN
分类号 H04W88/08;H04W4/02;H04W8/08;(IPC1-7):H04Q7/30 主分类号 H04W88/08
代理机构 代理人
主权项
地址