发明名称 Cumputer Program Product for Defining Slits in a Bus on a Chip
摘要 A method for manufacturing a power bus on a chip, where the power bus has slits generated therein. The present invention relates to a method to manufacture a power bus in which the reference to a layout data base shows the coordinate location of the power buses in the chip. A height and width for the power bus is calculated based on its coordinates. Based on the height and width of the power buses and the predetermined size and spacing between power slits, a number of power slits to be generated is determined. These power slits are then generated by adding the power slits to the power bus in the coordinates of the layout database. The method of the present invention also generates power slits for use in manufacturing power buses on a chip for cases in which the power buses overlap.
申请公布号 US2002078426(A1) 申请公布日期 2002.06.20
申请号 US20020077940 申请日期 2002.02.20
申请人 LIN CHONG MING;CHUANG TATAO;LONG TRAN;HOANG HY 发明人 LIN CHONG MING;CHUANG TATAO;LONG TRAN;HOANG HY
分类号 G06F17/50;H01L23/528;(IPC1-7):G06F17/50 主分类号 G06F17/50
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