| 摘要 |
In a level in which high density and miniaturization of wiring of circuit are proceeding in such an extent that optical proximity effect and the correction of optical proximity effect is necessary, a test design pattern having many test patterns corresponding to design conditions is produced, wherein each test pattern can be evaluated at a practical level. A design circuit pattern for test of semiconductor circuit comprises a circuit pattern having a plurality of circuits formed on a semiconductor wafer wherein each of the circuits is designed for test according to individual design condition as the object of electrical measurement and evaluation, wherein the design circuit pattern for test of semiconductor circuit comprises a group of test cells formed of the assembly of test cells including two or more of test cells wherein each of the test cells is formed of a unit of circuit of the object of electrical measurement and evaluation formed according to individual condition and having a switch or switches connected with on one end or both ends thereof; a decoder for generating on/off signal of a switch or switches provided within the group of test cells for specifying an evaluated test cell chosen from the group of test cells for electrical signal for specifying the evaluated test cell to the decoder; an input pad for providing electrical input signal of the evaluated test cell; an output pad for taking electrical output signal of the evaluated test cell; one or more of contrastive evaluated test cells provided apart from the group of test cells; a contrastive evaluated input pad for inputting electrical signal directly connected with one end of the contrastive evaluated test cells and provided every the contrastive evaluated test cell; and a contrastive evaluated output pattern for obtaining electrical signal directly connected with the other end of the contrastive evaluated test cells and provided every the contrastive evaluated test cell.
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