Memory module having data switcher in high speed memory device

摘要

In a memory module having a plurality of memory chips and a plurality of data switchers on one board, wherein each data switcher is selectively turned on or off in response to a switcher control signal to connect corresponding memory chip with a common data bus line, an apparatus for generating the switcher control signal includes: a plurality of shift counting units for shift counting a write command signal in response to an internal clock signal and a reset signal, to generate a plurality of shift counting signals; a switcher enable control signal generator for receiving the shift counting signals to generate a switcher enable control signal for enabling the switcher control signal during a predetermined time corresponding to a burst length; a pull down driver for pulling down the switcher control enable signal to generate a pull-down signal; and an output unit for outputting the switcher control signal in response to the pull-down signal.