发明名称 |
Device for evaluating characteristic of insulated gate transistor |
摘要 |
A transistor having a longer channel length and serving as a reference, and a transistor having a shorter channel length and to be subjected to effective channel length extraction are prepared (step ST1.1). A hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a gate overdrive is slightly changed is extracted in a mask channel length versus total drain-to-source resistance plane. The values of a function (F) are calculated which are defined by the difference between the rate of change in the total drain-to-source resistance and the product of a channel resistance per unit length and the rate of change in a mask channel length at the hypothetical points (step ST1.6). A true threshold voltage of the transistor having the shorter channel length is determined by a shift amount (delta) which minimizes the standard deviation of the function (F) determined in the step ST1.7 (step ST1.10). A resistance-based method thus extracts an effective channel length and a series resistance with increased accuracy.
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申请公布号 |
US6407573(B1) |
申请公布日期 |
2002.06.18 |
申请号 |
US19990238887 |
申请日期 |
1999.01.28 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA;MITSUBISHI ELECTRIC ENGINEERING CO., LTD. |
发明人 |
YAMAGUCHI KENJI;AMISHIRO HIROYUKI;MARUYAMA YUKO |
分类号 |
H01L21/66;G01R31/26;H01L29/78;(IPC1-7):G01R31/26 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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