发明名称 Video signal processing
摘要 A video signal processing circuit includes an input processor configured to modify an input video signal in accordance with image magnification data and a buffer memory for storing the modified video signal. The processing unit also includes a write control unit configured to control a write function to the buffer memory by generating a write control signal in accordance with the image magnification data. The write control unit includes a calculating circuit configured to calculate image size data on the basis of the write control signal in response to a change in the image magnification data. The write control unit also includes an inhibition circuit configured to inhibit the write function to the buffer memory at least while the calculation circuit calculates the image size data. The processing unit further includes a read control unit for controlling reading from the buffer memory in accordance with the calculated image size data. A method of processing a video signal also is disclosed.
申请公布号 US6407778(B1) 申请公布日期 2002.06.18
申请号 US19980039664 申请日期 1998.03.16
申请人 SANYO ELECTRIC, CO., LTD. 发明人 SHIMIZU YUTAKA;OTA SEIYA
分类号 H04N5/45;(IPC1-7):H04N9/74;H04N5/445 主分类号 H04N5/45
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