| 摘要 |
In one implementation, a method of forming an array of FLASH memory includes forming a plurality of lines of floating gates extending from a memory array area to a peripheral circuitry area over a semiconductor substrate. In a common masking step, discrete openings are formed over a) at least some of the lines of floating gates in the peripheral circuitry area, and b) floating gate source area in multiple lines along at least portions of the lines of floating gates within the memory array area. In one implementation, a line of floating gates is formed over a semiconductor substrate. A conductive line different from the line of floating gates is formed over the semiconductor substrate. In a common masking step, discrete openings are formed to a) at least one of the conductive line and the line of floating gates, and b) floating gate source area of multiple transistors comprising the line of floating gates along at least a portion of the line of floating gates. In one implementation, a method of forming FLASH memory and SRAM circuitry includes forming a line of floating gates over a semiconductor substrate and an SRAM gate over the semiconductor substrate. In a common masking step, discrete openings are formed over a) the SRAM gate, and b) floating gate source area of multiple transistors comprising the line of floating gates along at least a portion of the line of floating gates. Other implementations are disclosed. |
