发明名称 Shared redundancy integrated circuit memory, uses allocation circuits associated with memory banks to switch input/output lines
摘要 Each allocation circuit (20) associated with memory bank (B) has means to switch the input/output lines (IOLi) as well as conductors (CTRL) for individual activation of read amplifiers (SA) of concerned memory bank. The allocation circuits comprise input/output line switches (IOLi) formed in same metallic level. The input/output lines and activation conductors (CTRL) are also formed in same metallic level. The lines and conductors are interrupted to right of each allocation circuit. Integrated memory circuit having at least two banks (B) each having a matrix of memory elements having at least a redundancy column and each associated with its own read amplifiers (SA); a row of input/output buffer circuits common to the memory banks; each memory bank has an allocation circuit (20), for the redundancy column, top an input/output line (IOLi) connected to one of the buffers. Allocation can be effected, for a line of a current row, towards the preceding row of columns and towards the following row of columns.
申请公布号 FR2817982(A1) 申请公布日期 2002.06.14
申请号 FR20000016035 申请日期 2000.12.08
申请人 STMICROELECTRONICS SA 发明人 FERRANT RICHARD;JACQUET FRANCOIS;MURILLO LAURENT
分类号 G06F11/20;G11C7/00;G11C29/00;(IPC1-7):G06F11/20 主分类号 G06F11/20
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