| 摘要 |
PROBLEM TO BE SOLVED: To provide an input buffet of a semiconductor device in which irregularity of delay time is little. SOLUTION: A clock buffer 1 includes a comparator 2 including P channel MOS transistors 3, 4 whose gates receive the respective clock signals CLK, /CLK and a comparator 7 including N channel MOS transistors 10, 11 whose gates receive the respective clock signals CLK, /CLK, and generates a signal VO in response to an output signal VPO or VNO of the comparator 2 or 7 whose response time to a cross point of the clock signals CLK, /CLK is shorter. Even in the case where a level of the cross point disperses, irregularity of the response time of the signal VO to the cross point is reduced.
|
