| 摘要 |
A method of self-aligned shallow trench isolation and a method of manufacturing a non-volatile memory using the same are disclosed. An oxide layer, a first silicon layer and a nitride layer are successively formed on a semiconductor substrate. By using a single mask, the nitride layer, first silicon layer and oxide layer are etched to form an oxide layer pattern, a first silicon layer pattern and a nitride layer pattern. Subsequently, the upper portion of the substrate adjacent to the first silicon layer pattern is etched to a trench. The first silicon layer pattern and substrate are selectively etched to protrude the oxide layer pattern. The inner surface of the trench is oxidized to form a trench thermal oxide layer. Finally, a field oxide layer that fills up the trench is formed. Since the present invention prevents the sidewalls of the first silicon layer pattern from having a positive slope, a silicon residue does not remain during a subsequent gate etching process.
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