DATA PROCESSOR

摘要

A data processor which realizes an AV data transmitting/receiving system of a lower cost. A reception buffer monitor circuit (21) monitors the quantity of received data stored in a reception buffer (6). When a stored data quantity increases above the upper threshold value, the circuit (21) sets the frequen cy of a reception clock generated by a reception clock generating circuit (8) a t a higher frequency. When the stored quantity decreases below the lower reference value, the reception clock frequency is set at a lower frequency. An AV decoder (7) decodes AV data supplied from the reception buffer (6) on the basis of a reception clock supplied from the reception clock generating circuit (8). This invention is applied for a television transmitting/receivi ng system which transmits and receives television broadcasting signals.