SEMICONDUCTOR MEMORY DEVICE HAVING CONTROL CIRCUIT FOR REDUCING POWER CONSUMPTION OF DLL CIRCUIT AT STANDBY MODE AND POWER-DOWN CONTROL METHOD THEREOF

摘要

PURPOSE: A semiconductor memory device having a control circuit is provided to reduce power consumption of DLL circuit, and a power-down control method for the semiconductor memory device is provided to also reduce power consumption of DLL circuit. CONSTITUTION: DRAM includes a delay locked loop(DLL)(15), and first and second control circuits(11,13) for reducing a power consumption of the DLL at a standby mode. The DLL(15) is synchronized to a system clock signal(CLK), produces an internal clock signal(PCLK), and consumes much power. The first control circuit(11) is enabled in response to a signal(PSELF) informing that a self-refresh mode is switched to standby mode. The first control circuit(11) produces a control signal(PDLLCNT) disabled after a predetermined clock cycle. The second control circuit(13) activates DLL(15) in response to a signal(PSELF) informing that a self-refresh mode is switched to the standby mode. The second control circuit(13) inactivates DLL(15) in response to the disabled control signal(PDLLCNT) or a signal(CKEBPU) informing that a precharge power-down mode is switched to a standby mode.