发明名称 Clock recovery mechanism
摘要 A frequency estimate of an incoming data input is generated and transmitted with network traffic to a receiver. At the receiver, the estimate is recovered, decoded, and is used to seed an algorithm for locking the data access rate of the receiver to the incoming data. Data is buffered in buffers at each end of the system, and data flow out of the buffers is managed depending upon data rate.
申请公布号 US2002064248(A1) 申请公布日期 2002.05.30
申请号 US20000727246 申请日期 2000.11.30
申请人 ADC TELECOMMUNICATIONS, INC. 发明人 BERENS CHRISTOPHER JOSEPH;BARSAMIAN SARKIS;KOVACH ROBERT CHARLES
分类号 H04J3/06;(IPC1-7):H04L7/04 主分类号 H04J3/06
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