| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that has a circuit configuration permitting transmission of complementary signals in optimum timing. SOLUTION: The semiconductor integrated circuit has inverters 30, 50 and a PMOS transistor(TR) 109 arranged for a signal IN, and inverters 40, 60 and a PMOS TR 110 arranged with respect to the signal/IN substantially complementary to the signal IN. The TRs 109, 110 drive a potential of signal lines L1, L2. 1.8 V TRs are employed for the TRs 109, 110 and the inverters 50, 60 and 3.3 V TRs are used for the inverters 30, 40.
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