| 摘要 |
PROBLEM TO BE SOLVED: To provide a data processor capable of fast performing the arithmetic operation and the logic operation of a multiple-length numerical value. SOLUTION: In this data processor (1), a CPU (2) for decoding an instruction and performing the instruction sets control data through a bus (13), and the data processor (1) has a multiple-length arithmetic circuit (8) for performing arithmetic processing to multiple-length data on the basis of the set control data. The multiple-length arithmetic circuit performs read access of the multiple- length data in each processing unit of a plurality of bits, performs a partial operation of read data, performs write access of partial operation results, also repeats processing for transferring operation information necessary to the next partial operation to the next partial operation and operates the multiple-length data. The multiple-length arithmetic circuit is a bus master module for performing an addressing operation for itself and maybe operated by receiving the setting of the control data from the CPU, and the CPU does not have to repeatedly perform a data transfer instruction, an addition/subtraction instruction, etc., and can fast perform an operation of multiple-length data to be needed in elliptic curve cryptography, etc. |
