发明名称 System for reducing processor workloads with memory remapping techniques
摘要 A data-processing system with an enhanced system controller supporting memory-remapping function. The system controller has an access control circuit, a page/remapping management circuit and an open/remapped address table. The open/remapped address table is used to store mapping tables for indicating the mapping relation of memory segments and addresses dedicated to peripheral devices. The page/remapping management circuit should maintain and use the mapping tables in various operating mode. In addition, the page/remapping management circuit can redirect access requests to proper memory segments according to the mapping table corresponding to the current operating mode. Therefore, peripheral devices can effectively access and process the data stored in various memory segments by the change of the operating modes, not by physical data transfer.
申请公布号 US6393498(B1) 申请公布日期 2002.05.21
申请号 US19990260637 申请日期 1999.03.02
申请人 MENTOR ARC INC. 发明人 HOU CHIEN-TZU;HSU HSIU-YING
分类号 G06F3/06;G06F12/02;G06F12/06;(IPC1-7):G06F3/00 主分类号 G06F3/06
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