| 摘要 |
A semiconductor memory device is provided which enables faults in a word line to be redressed with almost no increase in chip size and which does not cause layout problems even in advanced miniaturization. A driver simultaneously drives four word lines. A memory cell connected to these word lines is selected by a selection transistor. Using wiring for connecting word lines, two adjacent word lines are connected at the far end as seen from the driver to form a loop. If a fault occurs at a location on a word line, the driver supplies a charge to the word line from the far end thereof to the fault location via the above wiring and the other word line. Therefore, the word potential at the far end past the fault location is at or above a memory cell threshold voltage, and the memory cell can be read correctly.
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