发明名称 |
MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR WAFER |
摘要 |
PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device and a semiconductor wafer for realizing an efficient probe inspection while reducing an integrated circuit chip. SOLUTION: Pads 4c and 4d for tests are provided on a division line 2 dividing a plurality of the integrated circuit chips 1. Switching circuits 6a-6d for turning ON/OFF the connection of a test circuit 3 inside the plurality of the integrated circuit chips 1, and the pads 4c and 4d for the tests arranged on the division line and switching pads 7a-7d for inputting switching signals for switching the switching circuits, are formed on the division line 2. Since the pads 4c and 4d for the tests, the switching circuits 6a-6d, and the switching pads 7a-7d on the division line are cut off at the time of division; a chip size is miniaturized without increasing the area of the semiconductor circuit chip 1.
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申请公布号 |
JP2002141383(A) |
申请公布日期 |
2002.05.17 |
申请号 |
JP20000338959 |
申请日期 |
2000.11.07 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
OYA MITSUNORI;NAKANE JOJI;SUMI TATSUMI |
分类号 |
H01L21/66;H01L21/822;H01L27/04;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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