| 摘要 |
<p>An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer (216) is formed on the semiconductor substrate, and a channel dielectric layer (208) formed on the device dielectric layer has an opening formed therein. A barrier layer (226) lines the channel opening and a conductor core (230) fills the opening over the barrier layer (226). After planarization of the conductor core (230) and the barrier layer (226), a plasma treatment is performed at 300 °C to reduce the conductor core material. A portion of a cap layer (220) is deposited at 300 °C and the remainder is deposited at 400 °C.</p> |
