发明名称 LEVEL CONVERSION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which converts a very small logic level of about 0.5 V into a 1 to 3 V of conventional logical level, and is low power consumption with a large allowance with respect to device characteristics, and further has a level conversion circuit that prevents deterioration of operational speed. SOLUTION: A semiconductor integrated circuit, of which each output of low voltage operation logic circuit and its logically converted output, is connected and driven to two outputs of a cross latch, which is composed of cross connection of two FETs via each gate grounded FET. Further two of the cross latch are set and a third cross latch (301, 302) is connected between the first and second output which are level converted by these two cross latches (the first and second cross latches).
申请公布号 JP2002135106(A) 申请公布日期 2002.05.10
申请号 JP20000325047 申请日期 2000.10.25
申请人 TOSHIBA CORP 发明人 OUCHI KAZUNORI;KAMEYAMA ATSUSHI;FUSE TSUNEAKI;YOSHIDA MASAKO
分类号 G11C11/417;G11C11/409;H01L21/822;H01L21/8238;H01L27/04;H01L27/092;H03K19/00;H03K19/0185;(IPC1-7):H03K19/018;H01L21/823 主分类号 G11C11/417
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