| 摘要 |
PROBLEM TO BE SOLVED: To prevent lowering in the arithmetic efficiency of a processor by performing condition branch deciding processing in interruption processing. SOLUTION: An address comparator 14 receives a memory access control signal, compares address data preset by an address setting circuit 11 and address data inputted through an address bus AB and outputs an address matching detecting signal SC when these address data are matched. A measuring instrument 15 measures the number of times of address matching detecting signals SC, compares the number of times measured by the measuring instrument 15 with the number of times of detection set by a time setting circuit 12 and outputs a measured-number-of-times matching signal KS in the case of matching. Only when the measured-number-of-times matching signal KS is inputted and an interruption signal INTA of a peripheral module is inputted, a condition deciding mechanism 16 outputs an interruption control signal INTC to the processor.
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