发明名称 Test method for writable nonvolatile semiconductor memory device
摘要 An object of the present invention is to provide a semiconductor device that permits easy and efficient testing. A nonvolatile semiconductor memory comprises word lines WLi and bit lines BLi, a memory cell matrix 17 consisting of nonvolatile memory cells Cij, a sense amplifier 15, a write/erase timing circuit 9 for performing timing control necessary for write and erase operations, and a status register 2 for storing the operating state of the memory at the completion of the operation of the circuit 9, wherein there are provided, outside the address of the memory cell matrix 17, two kinds of dummy cells, D1, D2, D3,..., whose values are fixed to different values that induce different outputs from the sense amplifier 15. A pass condition or a fail condition is generated by accessing the dummy cells. <IMAGE>
申请公布号 EP0935256(B1) 申请公布日期 2002.05.08
申请号 EP19990105448 申请日期 1994.02.08
申请人 FUJITSU LIMITED 发明人 KUMAKURA, SINSUKE;YAMAZAKI, HIROKAZU;WATANABE, HISAYOSHI;KASA, YASUSHI
分类号 G01R31/28;G11C5/14;G11C7/06;G11C16/06;G11C17/00;G11C29/00;G11C29/02;G11C29/24;G11C29/44;G11C29/50;H01L21/8247;H01L27/115;(IPC1-7):G11C29/00;H01L21/02 主分类号 G01R31/28
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