| 摘要 |
A level shifter may be utilized in a flash memory to reduce the standby power consumption. The level shifter may be coupled so that the gate-to-source voltage of the input transistor is reduced during standby operations to reduce leakage current. At the same time, the source of the input transistor may be coupled to a lower voltage during active level shifting operations. Thus, good transistor characteristics may be achieved with reduced leakage currents.
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