发明名称 |
Electronic circuit suppresses access to memory for faulty address test of storage range in memory field |
摘要 |
The circuit comprises a comparator (4) for a data value with associated rated data value to determine a faulty address. The data value has been read-out of an addressed memory range of the memory field (1) during testing.The circuit has also a faulty address memory (9). Between the comparator and faulty address memory is fitted a switch (7) to deposit the address as faulty one in the faulty address memory, dependent on a control signal (Hit). Independent claims are included for an integrated circuit and method of faulty address suppression.
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申请公布号 |
DE10062093(A1) |
申请公布日期 |
2002.05.02 |
申请号 |
DE20001062093 |
申请日期 |
2000.12.13 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
KAISER, ROBERT;SCHAMBERGER, FLORIAN |
分类号 |
G11C29/00;G11C29/38;G11C29/44;(IPC1-7):G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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