| 摘要 |
A semiconductor device has a cell-plate-potential-switching circuit that comprises a switch transistor nSTr (a n-type MOS transistor) and a switch transistor pSTr (a p-type MOS transistor). One source/drain of each of the switch transistors nSTr and pSTr is connected to the corresponding each of cell plates CP. Half of the power supply potential, (½)Vcc, is applied to the other source/drain of each of the switch transistors nSTr. Potential (½)Vcc is therefore applied to the cell plates CP of the memory cells Mc, which is selected. A potential (½)Vcc+alphacp is applied to the other source/drain of the switch transistor pSTr. Potential (½)Vcc+alphacp is therefore applied to the cell plates CP of the memory cells MC which is not selected.
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