| 摘要 |
PURPOSE: A high-electron-mobility-transistor(HEMT) having a single integrated enhancement-depletion(ED) mode is provided to reduce gate capacitance of an enhancement HEMT and to improve an operating speed of the transistor, by increasing the thickness of a whole barrier layer for obtaining the threshold voltage of a desired enhancement HEMT device. CONSTITUTION: A buffer layer(130), a channel layer(140), a spacer layer(145), the first barrier layer(150), the second barrier layer(152), the third barrier layer(154) and an ohmic layer(160) in ohmic-contact with the third barrier layer are sequentially formed on a semiconductor substrate(120). The ohmic layer is etched to expose the third barrier layer so that the first exposure region(252) is formed. The ohmic layer and the third barrier layer are etched to expose the second barrier layer so that the second exposure region is formed. Gate electrodes(356,358) are formed in phases respectively formed in the first and second exposure regions.
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