| 摘要 |
<p>An object of the present invention is to provide a multiply-accumulate unit with a rounding function which is capable of effecting 16-bit multiply-accumulate operations taking into account the position of an addend in a register. The multiply-accumulate unit with the rounding function has a selection inputting and expanding means 42 for expanding an addend from 31st - 16th bits of 40-bit register 1 into 40-bit data and transmitting the 40-bit data to MAC (multiply-accumulate) unit 41 if control signal Position from an external source is "1", and expanding an addend from 15th - 0th bits of 40-bit register 1 into 40-bit data and transmitting the 40-bit data to MAC unit 41 if control signal Position is "0". MAC unit 41 performs a multiply-accumulate operation on the 40-bit data, 16-bit data multiplicand B, and multiplier C. Rounding and selection outputting means 43 rounds off the result of the multiply-accumulation operation into 16-bit data if control signal Round from an external source is "1", and outputs the rounded data to the position of the addend in the 40-bit register 1, where the position is indicated by control signal Position. <IMAGE></p> |
