| 摘要 |
High aspect ratio vias formed in a first insulating layer covering a semiconductor substrate (body) are filled with conductors in a manner that both reduces the number of processing steps and allows an alignment tool (stepper) to align to alignment and overlay marks. Sidewalls and a bottom of each via are coated with a composite layer of titanium, titanium nitride, and a chemical vapor deposited seed layer of aluminum. A first physical vapor deposited layer of aluminum is then formed while the semiconductor body is heated to about 400 degrees C. to completely the vias and to overflow same to form a blanket layer of aluminum above the first insulating layer. A second physical vapor deposited layer of aluminum is then formed over the first blanket layer of aluminum while the structure is heated to about 200 degrees C. to form a second blanket layer of aluminum over the first. The second blanket layer of aluminum is then patterned and portions not covered by the pattern are removed, as well as portions of the first blanket layer below the removed portions of the second blanket layer to result in columns of aluminum. A second insulating layer is then formed around the columns of aluminum. The ends of the columns of aluminum at a top of the second insulating layer lie in a common plane to which steppers can relatively easily align patterns.
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