Semiconductor device with DRAM and logic part integrated

摘要

An LSI on which a DRAM is mounted together with a logic part, which does not require the level shifter control signal so as to simplify the circuit configuration and reduces power consumption. This LSI includes a level shifter 3 and an interface circuit 5. The level shifter 3 converts the operation voltage level of the DRAM control signal and input data output from the logic part 2 operating with a low voltage power supply, and outputs the DRAM control signal to a DRAM 6. The interface circuit 5 controls the input data output from the level shifter 3 and the output data output from the DRAM 6 by an interface control signal supplied from the DRAM 6, outputs the input data into the DRAM 6 and outputs the output data to the external data output terminal and the logic part.