发明名称 SERIAL ACCESS MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a serial access memory which can suppress an increase in chip size even when the memory capacity increases and has small current consumption. SOLUTION: This memory has 1st and 2nd memory arrays (a) and (b) having memory cells connected to bit lines BLia, signal lines CLi which are provided in common to those memory arrays (a) and (b) and are connected to the bit lines BLia through 1st transfer means Ha and Hb, write registers WRm which are connected to the signal lines CLi through a 2nd transfer means F, a write bus WD which is connected to the write registers WRm through a 3rd transfer means D, an input means L which is connected to the write bus WD, read registers RRm which are connected to the signal lines CLi through a 4th transfer means I, a read bus RD which is connected to the read registers RRm through a 5th transfer means K, and an input means M which is connected to the read bus RD.
申请公布号 JP2002109878(A) 申请公布日期 2002.04.12
申请号 JP20000299673 申请日期 2000.09.29
申请人 OKI ELECTRIC IND CO LTD 发明人 YOSHIOKA SHIGEMI
分类号 G11C11/401;G11C7/10;(IPC1-7):G11C11/401 主分类号 G11C11/401
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