发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which can reduce variance in access time due to a data pattern. SOLUTION: This device is equipped with register circuits 11-1 to 11-n which receive n-bit read data RD1 to RDn and have their output timing controlled with a clock OUTCLK for read data output, delay adjusting circuits 12-1 to 12-n which receive the outputs of the register circuits 11-1 to 11-n and have their delay times adjusted with delay adjustment signals DPSW1 to DPSWn obtained by decoding the read data RD1 to RDn, and off-chip driver circuits 14-1 to 14-n which receive the outputs of the delay adjusting circuits 12-1 to 12-n.
申请公布号 JP2002109888(A) 申请公布日期 2002.04.12
申请号 JP20000297703 申请日期 2000.09.28
申请人 TOSHIBA CORP 发明人 NAGABA KATSUSHI;OSHIMA SHIGEO
分类号 G11C11/417;G11C7/10;G11C11/401;G11C11/407;H01L31/0336;(IPC1-7):G11C11/417 主分类号 G11C11/417
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