| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a clock signal generator which generates clock signal by a method where the clock signal acquired from the most significant bit of a DT oscillator comprises a minimum phase jitter, with reference to a DTO output signal. SOLUTION: The clock signal generator is provided with the DT oscillator 4, which is clocked by an input clock signal and which generates a cyclic digital DTO output signal, a phase-shift calculation unit 12 which calculates the phase shift between the signal phase of the DTO output signal and the signal phase of the most significant bit (MSB) of the DTO output signal and a phase-shift reduction unit 30, in which the phase shift between the signal phase of the DTO output signal and the signal phase of the most significant bit MSB of the DTO output signal is reduced as a function of a calculated phase shift. The most significant bit MSB is output as the clock signal, comprising the reduced phase shift in a clock signal generation output part 41.</p> |
