| 摘要 |
<p>A method and system for evaluating performance level models of electronic systems having both hardware and software, and allowing for the implementation and testing of different architectural designs for compliance with desired operational requirements. Behavior and architecture are captured (Steps 10 and 15) and mapped to architectural components (Step 20). The mapped system is simulated (Step 25), hardware and software components are exported (Step 30), and both hardware and software components are separately verfied (Steps 35-50), and the resulting system is verified using a co-verification tool (Step 55).</p> |
