| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of improving through-put and avoiding meta stable at the time of transferring a signal between plural circuit parts operating with clocks whose frequencies are different. SOLUTION: This semiconductor integrated circuit is provided with a first circuit part 1 operating with a first clock, a second circuit part 2 operating with a second clock, a clock generating circuit 7 for generating a third clock, a first frequency-dividing circuit 8 for acquiring the first clock by frequency- dividing the third clock, a second frequency-dividing circuit 9 for acquiring the second clock by frequency-dividing the third clock, selective delay means 11 and 12 for selectively delaying the signal inputted from the first circuit part, and holding means 14 and 15 for holding the signal inputted from the selective delay means synchronously with the second clock, and for outputting it to the second circuit part.</p> |
