发明名称 |
TIME-OUT COUNTER FOR MULTIPLE TRANSACTION BUS SYSTEM AND BUS BRIDGE |
摘要 |
PROBLEM TO BE SOLVED: To provide technology which has its wider applicability and can be applied to various types of multiple processor system having multiple bus architectures. SOLUTION: A time-out counter 302 supplies capability of a bus bridge where a 1st bus master produces a time-out interrupt 364 as long as the 1st bus master cannot perform the control of a 2nd bus within a certain period when the arbitration time is excessive about the 2nd bus. The counter 302 can perform programming up to 16 bits and allows software to select the time-out length.
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申请公布号 |
JP2002091900(A) |
申请公布日期 |
2002.03.29 |
申请号 |
JP20010271859 |
申请日期 |
2001.09.07 |
申请人 |
TEXAS INSTRUMENTS INC |
发明人 |
JAHNKE STEVEN R;HAMAKAWA HIROYUKI |
分类号 |
G06F13/36;G06F13/14;G06F13/24;G06F13/362;G06F13/38;G06F13/40;(IPC1-7):G06F13/36 |
主分类号 |
G06F13/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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