发明名称 Method and apparatus for out-of-order instruction execution in a superscalar microprocessor
摘要 A microprocessor includes a plurality of resources for executing instructions, and an out-of-order instruction held for priority/age tracking of the instructions. The shelf has an instruction pool with a plurality of slots for storing respective instructions, and an instruction age tracker for storing a matrix of rows and columns of logic states associated with relative ages of instructions. The logic states in a given column and row are associated with a respective slot of the instruction pool. An instruction scheduler performs at least one logic function on each column to determine an oldest instructions, for dispatching instructions to the plurality of resources based thereon, and for updating the matrix based upon dispatched instructions. <IMAGE>
申请公布号 EP1164472(A3) 申请公布日期 2002.03.27
申请号 EP20010304401 申请日期 2001.05.18
申请人 STMICROELECTRONICS, INC. 发明人 PROTIP, ROY
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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