发明名称 VDMOS transistor protected against over-voltages between source and gate
摘要 The n-channel VDMOS transistor is formed in an n-type active region of an integrated circuit with junction isolation. To prevent over-voltages between source and gate which could damage or destroy the gate dielectric, a p-channel MOS transistor is formed in the same active region and has its gate electrode connected to the gate electrode of the VDMOS transistor, its source region in common with the source region of the VDMOS transistor, and its drain region connected to the p-type junction-isolation region. The p-channel MOS transistor has a threshold voltage below the breakdown voltage of the gate dielectric of the VDMOS transistor so that it acts as a voltage limiter.
申请公布号 US6362036(B1) 申请公布日期 2002.03.26
申请号 US20010756886 申请日期 2001.01.09
申请人 STMICROELECTRONICS S.R.L. 发明人 CHIOZZI GIORGIO;ANDREINI ANTONIO
分类号 H01L29/06;H01L21/76;H01L27/02;H01L29/739;H01L29/78;(IPC1-7):H01L21/823 主分类号 H01L29/06
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