发明名称 |
Semiconductor device with DMOS and bi-polar transistors |
摘要 |
A gate electrode layer is formed opposite to a p type backgate region posed between an n type source region and an n type epitaxial region, with a gate insulating layer interposed therebetween. A sidewall insulating layer is formed to cover a sidewall of the gate electrode layer. A p type backgate region has a relatively shallow p type diffusion region and a relatively deep p type diffusion region. The relatively deep p type diffusion region has a portion overlapping the relatively shallow p type diffusion region, and has its end portion at the substrate surface located directly beneath the sidewall insulating layer. Accordingly, a semiconductor device and a manufacturing method thereof that allow easy control of the threshold voltage of a DMOS transistor and facilitate realization of a rapidly operating bipolar transistor are attained.
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申请公布号 |
US6359318(B1) |
申请公布日期 |
2002.03.19 |
申请号 |
US19990258401 |
申请日期 |
1999.02.26 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
YAMAMOTO FUMITOSHI;TERASHIMA TOMOHIDE |
分类号 |
H01L21/265;H01L21/336;H01L21/8222;H01L21/8248;H01L21/8249;H01L27/06;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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地址 |
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