发明名称 MEMORY CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To simplify a circuit configuration in the case of initializing a memory. SOLUTION: An address control section 113 sets a read address in a head address =000, sets a write enable signal to a low level for a period before a cycle of a read address, and sets the signal to a high (active) level for a period after the cycle. A read section 111 reads data from an area pointed out by the read address for a period when the write enable signal is at a low level, then an initializing section 112 writes initialized data (e.g. FF) to an area pointed out by the read address for a period when the write enable signal is at a high level and this continues up to a final address = FFF even when no user information is stored.
申请公布号 JP2002077086(A) 申请公布日期 2002.03.15
申请号 JP20000255919 申请日期 2000.08.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KADOMA AKIYOSHI;HASHIMOTO YUJI;NIISAKO KAZUHIRO
分类号 H04J3/00;H04J3/04;(IPC1-7):H04J3/00 主分类号 H04J3/00
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