发明名称 Asynchronous transfer mode switching architectures having connection buffers
摘要 Improved methods and apparatus to facilitate switching Asynchronous Transfer Mode (ATM) cells through an ATM switching circuit are disclosed. The improved methods and apparatus facilitate the implementation of per virtual connection buffering, per virtual connection arbitration of ATM cells, and/or per virtual connection back-pressuring to improve switching efficiency and/or reduce the complexity and/or costs of the ATM switching circuit.
申请公布号 US2002031127(A1) 申请公布日期 2002.03.14
申请号 US20000579844 申请日期 2000.05.26
申请人 PARRUCK BIDYUT;SANGHVI CHETAN V.;BHASIN VINAY KUMAR;DHARMAPURIKAR MAKARAND;JOSHI UDAY GOVIND 发明人 PARRUCK BIDYUT;SANGHVI CHETAN V.;BHASIN VINAY KUMAR;DHARMAPURIKAR MAKARAND;JOSHI UDAY GOVIND
分类号 H04L12/56;(IPC1-7):H04L12/28 主分类号 H04L12/56
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